Digital Systems Design


The course is devoted to digital system design concepts. The emphasis is decomposed on one hand into conceptual aspects, namely specification formalisms, (including state diagrams, statecharts and Petri nets), and on the other hand into implementation aspects, covering hardware description languages (VHDL), reconfigurable devices and digital systems testing.

General characterization





Responsible teacher

Luís Filipe Santos Gomes


Weekly - 4

Total - 56

Teaching language



Recommended knowledge of digital systems at introductory level (namely attendance and successful accomplishment of the course of Logical Systems at a minimum)


"Introduction to Programmable Logic"; Karen Parnell and Nick Mehta; Xilinx 2004
"Hardware-level Design Languages", Luis Gomes, Anikó Costa; "The Industrial Information Technology Handbook"; Richard Zurawski (Editor-in-Chief), section VI – Real time embedded systems; chapter 84; CRC; ISBN 0849319854; 2005; pp. 84-1, 84-18
"Checking experiments in sequential machines", pp. 147-150; Asok Bhattacharyya; John Wiley & Sons, 1989
"VHDL for Designers",  Stefan Sjoholm, Lennart Lindh; Prentice Hall, 1997, ISBN 0-13-473414-9
"Statecharts: a visual formalism for complex systems", vol. 8, pp. 231-274; David Harel; Science of Computer Programming 1987
"Petri Nets and Industrial Applications: A Tutorial", Richard Zurawski and MengChu Zhou; IEEE Transactions on Industrial Electronics, Vol.41, no. 6, December 1994, pp. 567-583
"Digital Logic Circuit Analysis and Design", sec. 2.7.4 & c. 12; Victor Nelson, H. Troy Nagle, Bill Carroll, J. David Irwin; Prentice Hall 1995; ISBN 0-13-463894-8

Teaching method

Theoretical subjects are offered in lectures, two hours per week in which discussions are promoted, whenever possible, allowing emphasizing different aspects, from conceptual (namely in systems specification formalisms based on state machines, statecharts, and Petri nets), as well as on implementation aspects and technology of digital systems, including hardware description languages ​​(VHDL) and reconfigurable devices platforms (FPGAs).

The lab classes lasting two hours per week, where students undertake mini-projects "from specification to implementation", with increasing degree of autonomy, using professional level computational tools.
Each group receives one working experimentation board (with one FPGA) allowing testing outside the laboratory.

Evaluation method

Theoretical component:

The theoretical component of the course can be carried out through 3 moments of evaluation (1st test, weighing 22%, 2nd test 22%, 3rd test 16%) or exam; It is necessary to have tests average or exam grade higher than 9.5 values.

Lab component:

The lab component will consist of 2 assignments, 20% of the final grade associated with each assignment. It is necessary to have an average of more than 9.5 values.

An optional additional work may introduce a bonus of up to 1 value in the practical grade (with a limit of 20 values).

All grades will be represented with two decimal places.

Theoretical component carried out in the previous two years is equivalent to exam.

Lab component carried out in the previous two years is equivalent to practical component.

Subject matter

(1st part)

Specification of digital systems: Graphical versus textual formalisms. State diagrams: Moore and Mealy machines; state encoding. Digital systems synthesis: synchronous and asynchronous implementations, programmable logic devices based implementations (PALs, CPLDs, FPGAs).

Hardware description languages, VHDL.

(2nd part)

Statecharts: characteristics, depth, orthogonality, broadcast, hystory, translation into state diagrams; implementation issues.

Petri nets: characteristics, low-level and high-level classes, non-autonomous extensions (time, events, actions), implementation issues; analysis, propriety verification, state space construction.

 (3rd part)

Modeling and test of digital systems: models, simulation. Test: combinatorial logic, observability and controllability; fault models, sequential circuit testing, scan techniques. DFT-design for testability. Functional testing. Compression techniques. LFSR – Linear feedback shift registers: test vector generation, signature generation. BIST-built-in self-test